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PPAM
2007
Springer
15 years 10 months ago
Parallel Tiled QR Factorization for Multicore Architectures
As multicore systems continue to gain ground in the High Performance Computing world, linear algebra algorithms have to be reformulated or new algorithms have to be developed in or...
Alfredo Buttari, Julien Langou, Jakub Kurzak, Jack...
MOBICOM
2004
ACM
15 years 10 months ago
Initializing newly deployed ad hoc and sensor networks
A newly deployed multi-hop radio network is unstructured and lacks a reliable and efficient communication scheme. In this paper, we take a step towards analyzing the problems exis...
Fabian Kuhn, Thomas Moscibroda, Roger Wattenhofer
FPL
2003
Springer
100views Hardware» more  FPL 2003»
15 years 10 months ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...
ICPP
1998
IEEE
15 years 9 months ago
Improving Parallel-Disk Buffer Management using Randomized Writeback
We address the problems of I/O scheduling and buffer management for general reference strings in a parallel I/O system. Using the standard parallel disk model withD disks and a sh...
Mahesh Kallahalla, Peter J. Varman
CODES
1996
IEEE
15 years 9 months ago
A Multi-Level Transformation Approach to HW/SW Codesign: A Case Study
This reported work applies a transformational synthesis approach to hardware/software codesign. In this approach, the process of algorithm design is coupled early on with hardware...
Tommy King-Yin Cheung, Graham R. Hellestrand, Pras...