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» Scheduling Processing Resources in Programmable Routers
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OSDI
2004
ACM
15 years 10 months ago
MapReduce: Simplified Data Processing on Large Clusters
MapReduce is a programming model and an associated implementation for processing and generating large data sets. Users specify a map function that processes a key/value pair to ge...
Jeffrey Dean, Sanjay Ghemawat
99
Voted
BROADNETS
2006
IEEE
15 years 3 months ago
Distributed Job Scheduling based on Multiple Constraints Anycast Routing
— As the popularity of resource-constrained devices such as hand-held computers increases, a new network service offloading complex processing tasks towards computational resour...
Tim Stevens, Marc De Leenheer, Filip De Turck, Bar...
DAC
2005
ACM
15 years 10 months ago
Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration
Many reconfigurable architectures offer partial dynamic configurability, but current system-level tools cannot guarantee feasible implementations when exploiting this feature. We ...
Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. D...
ISCA
2005
IEEE
101views Hardware» more  ISCA 2005»
15 years 3 months ago
Virtualizing Transactional Memory
Writing concurrent programs is difficult because of the complexity of ensuring proper synchronization. Conventional lock-based synchronization suffers from wellknown limitations, ...
Ravi Rajwar, Maurice Herlihy, Konrad K. Lai
75
Voted
DAC
1997
ACM
15 years 1 months ago
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Marleen Adé, Rudy Lauwereins, J. A. Peperst...