51 search results - page 6 / 11 » Scheduling and Binding Algorithms for High-Level Synthesis |
CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
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CODES
2003
IEEE
15 years 2 months ago
2003
IEEE
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
VLSID
2003
IEEE
15 years 10 months ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
ASPDAC
2005
ACM
14 years 11 months ago
2005
ACM
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
CEC
2008
IEEE
15 years 4 months ago
2008
IEEE
— The high-level synthesis process involves three interdependent and NP-complete optimization problems: (i) the operation scheduling, (ii) the resource allocation, and (iii) the ...