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ISCA
2011
IEEE
271views Hardware» more  ISCA 2011»
14 years 1 months ago
CRIB: consolidated rename, issue, and bypass
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
Erika Gunadi, Mikko H. Lipasti
RTAS
2007
IEEE
15 years 3 months ago
Hijack: Taking Control of COTS Systems for Real-Time User-Level Services
This paper focuses on a technique to empower commercial-off-the-shelf (COTS) systems with an execution environment, and corresponding services, to support realtime and embedded ap...
Gabriel Parmer, Richard West
IEEEPACT
2002
IEEE
15 years 2 months ago
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
Gautham K. Dorai, Donald Yeung
JCSS
2008
81views more  JCSS 2008»
14 years 9 months ago
A simulator for adaptive parallel applications
Dynamically allocating computing nodes to parallel applications is a promising technique for improving the utilization of cluster resources. Detailed simulations can help identify...
Basile Schaeli, Sebastian Gerlach, Roger D. Hersch
MOBICOM
2009
ACM
15 years 4 months ago
Opportunistic flooding in low-duty-cycle wireless sensor networks with unreliable links
Intended for network-wide dissemination of commands, configurations and code binaries, flooding has been investigated extensively in wireless networks. However, little work has ...
Shuo Guo, Yu Gu, Bo Jiang, Tian He