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» Scheduling in the Z-Polyhedral Model
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MICRO
1996
IEEE
106views Hardware» more  MICRO 1996»
15 years 1 months ago
Optimization of Machine Descriptions for Efficient Use
A machine description facility allows compiler writers to specify machine execution constraints to the optimization and scheduling phases of an instruction-level parallelism (ILP)...
John C. Gyllenhaal, Wen-mei W. Hwu, B. Ramakrishna...
ICSE
1997
IEEE-ACM
15 years 1 months ago
Analyzing Partially-Implemented Real-Time Systems
—Most analysis methods for real-time systems assume that all the components of the system are at roughly the same stage of development and can be expressed in a single notation, ...
George S. Avrunin, James C. Corbett, Laura K. Dill...
DAC
1994
ACM
15 years 1 months ago
The Design of High-Performance Microprocessors at Digital
Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
Thomas F. Fox
CONEXT
2007
ACM
15 years 1 months ago
Practical service provisioning for wireless meshes
Community wireless mesh networks (WMNs) are increasingly being deployed for providing cheap, low maintenance Internet access. For the successful adoption of WMNs as a last-mile te...
Saumitra M. Das, Dimitrios Koutsonikolas, Y. Charl...
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
15 years 1 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...