221 search results - page 10 / 45 » Scheduling instruction effects for a statically pipelined pr... |
ISLPED
2003
ACM
15 years 3 months ago
2003
ACM
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
MICRO
1996
IEEE
15 years 2 months ago
1996
IEEE
Modern microprocessors offer more instruction-level parallelism than most programs and compilers can currently exploit. The resulting disparity between a machine's peak and a...
MICRO
1992
IEEE
15 years 2 months ago
1992
IEEE
An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling pro...
ASPLOS
1998
ACM
15 years 2 months ago
1998
ACM
Advances in VLSI technology will enable chips with over a billion transistors within the next decade. Unfortunately, the centralized-resource architectures of modern microprocesso...
ISCA
2005
IEEE
15 years 4 months ago
2005
IEEE
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...