221 search results - page 24 / 45 » Scheduling instruction effects for a statically pipelined pr... |
IEEEPACT
2000
IEEE
15 years 2 months ago
2000
IEEE
Branch prediction accuracy is a very important factor for superscalarprocessor performance. The ability topredict the outcome of a branch allows the processor to effectively use a...
LCTRTS
2007
Springer
15 years 4 months ago
2007
Springer
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
129
click to vote
RTSS
1998
IEEE
15 years 2 months ago
1998
IEEE
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
ICPP
2002
IEEE
15 years 3 months ago
2002
IEEE
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
ISCA
2003
IEEE
15 years 3 months ago
2003
IEEE
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...