221 search results - page 39 / 45 » Scheduling instruction effects for a statically pipelined pr... |
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ACMSE
2004
ACM
15 years 3 months ago
2004
ACM
Modern processors include features such as deep pipelining, multilevel cache hierarchy, branch predictors, out of order execution engine, and advanced floating point and multimedi...
MICRO
1997
IEEE
15 years 2 months ago
1997
IEEE
The multicluster architecture that we introduce offers a decentralized, dynamically-scheduled architecture, in which the register files, dispatch queue, and functional units of t...
CASES
2008
ACM
15 years 11 days ago
2008
ACM
In a hard real-time embedded system, the time at which a result is computed is as important as the result itself. Modern processors go to extreme lengths to ensure their function ...
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ISHPC
2000
Springer
15 years 1 months ago
2000
Springer
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
ISLPED
2007
ACM
14 years 12 months ago
2007
ACM
Throughput servers using simultaneous multithreaded (SMT) processors are becoming an important paradigm with products such as Sun's Niagara and IBM Power5. Unfortunately, thr...