We consider a variety of dynamic, hardware-based methods for exploiting load/store parallelism, including mechanisms that use memory dependence speculation. While previous work ha...
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
This paper presents language features for High Performance Fortran HPF to specify non-local access patterns of distributed arrays, called halos, and to control the communication as...
This paper describes the design of the Bus Timetabling System (BTS) we have developed for one of the largest privately held bus companies in the world. This Bus Company operates cl...
Abstract. Alias analysis, traditionally performed statically, is unsuited for a dynamic binary translator (DBT) due to incomplete control-flow information and the high complexity o...
Bolei Guo, Youfeng Wu, Cheng Wang, Matthew J. Brid...