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ASPDAC
2008
ACM
88views Hardware» more  ASPDAC 2008»
15 years 1 months ago
REWIRED - Register Write Inhibition by Resource Dedication
We propose REWIRED (REgister Write Inhibition by REsource Dedication), a technique for reducing power during high level synthesis (HLS) by selectively inhibiting the storage of fun...
Pushkar Tripathi, Rohan Jain, Srikanth Kurra, Pree...
LCTRTS
2010
Springer
15 years 1 months ago
Resilience analysis: tightening the CRPD bound for set-associative caches
In preemptive real-time systems, scheduling analyses need—in addition to the worst-case execution time—the context-switch cost. In case of preemption, the preempted and the pr...
Sebastian Altmeyer, Claire Maiza, Jan Reineke
PEWASUN
2008
ACM
15 years 1 months ago
Communication models for throughput optimization in mesh networks
There has been extensive research focused on maximizing the throughput of wireless networks in general and mesh networks in particular. Recently, techniques have been developed th...
Stephan Bohacek, Peng Wang
WSC
2000
15 years 1 months ago
Product-mix analysis with Discrete Event Simulation
Discrete Event Simulation (DES) has been used as a design and validation tool in various production and business applications. DES can also be utilized for analyzing the product-m...
Raid Al-Aomar
WSC
1997
15 years 1 months ago
Solving Engine Maintenance Capacity Problems with Simulation
For many companies the scheduling of job shops proves very difficult. Competing priorities (due dates, potential profit) from multiple customers confronts the plant manager with m...
Robert Gatland, Eric Yang, Kenneth Buxton