: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
In this paper, a new approach to analog test design based on the circuit design process, called Characteristic Observation Inference (COI), is presented. In many situations, it is...
Walter M. Lindermeir, Helmut E. Graeb, Kurt Antrei...
We consider the problem of transistor sizing in a static CMOS layout to minimizethe power consumption of the circuit subject to a given delay constraint. Based on our characteriza...
Manjit Borah, Robert Michael Owens, Mary Jane Irwi...
This paper presents a new logic style, named Current-Mode Differential logic (CMDL), that achieves both high operating speed and low power consumption. Inspired by the low-voltage ...
Abstract-- This paper studies distributed coordination algorithms for multiple fractional-order systems over a directed communication graph. A general fractional-order consensus mo...