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114
Voted
HPCA
2006
IEEE
16 years 4 months ago
LogTM: log-based transactional memory
Transactional memory (TM) simplifies parallel programming by guaranteeing that transactions appear to execute atomically and in isolation. Implementing these properties includes p...
Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan...
117
Voted
HPCA
2003
IEEE
16 years 4 months ago
TCP: Tag Correlating Prefetchers
Although caches for decades have been the backbone of the memory system, the speed gap between CPU and main memory suggests their augmentation with prefetching mechanisms. Recentl...
Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
149
Voted
HPCA
2003
IEEE
16 years 4 months ago
Slipstream Execution Mode for CMP-Based Multiprocessors
Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism y...
Khaled Z. Ibrahim, Gregory T. Byrd, Eric Rotenberg
138
Voted
HPCA
2003
IEEE
16 years 4 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
149
Voted
CHI
2004
ACM
16 years 4 months ago
Physically large displays improve path integration in 3D virtual navigation tasks
Previous results have shown that users perform better on spatial orientation tasks involving static 2D scenes when working on physically large displays as compared to small ones. ...
Desney S. Tan, Darren Gergle, Peter Scupelli, Rand...
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