133 search results - page 18 / 27 » Secure Compilation to Modern Processors |
ISCA
1999
IEEE
15 years 1 months ago
1999
IEEE
By optimizing data layout at run-time, we can potentially enhance the performance of caches by actively creating spatial locality, facilitating prefetching, and avoiding cache con...
CASES
2007
ACM
15 years 1 months ago
2007
ACM
This paper tackles the problem of providing correct information about program variable values in a software-pipelined loop through a non-transparent debugging approach. Since mode...
FPL
2007
Springer
15 years 1 months ago
2007
Springer
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
ASPLOS
2008
ACM
14 years 11 months ago
2008
ACM
Multi-core processors, with low communication costs and high availability of execution cores, will increase the use of execution and compilation models that use short threads to e...
ESORICS
2006
Springer
15 years 1 months ago
2006
Springer
Abstract. While processor based systems often enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reconfigurable har...