147 search results - page 28 / 30 » Secure Memory Accesses on Networks-on-Chip |
ICPP
2008
IEEE
15 years 4 months ago
2008
IEEE
This paper presents a novel stateless, virtualized communication engine for sub-microsecond latency. Using a Field-Programmable-Gate-Array (FPGA) based prototype we show a latency...
IPPS
2002
IEEE
15 years 2 months ago
2002
IEEE
This paper introduces semi-user-level communication architecture, a new high-performance light-weighted communication architecture for inter-node communication of clusters. Differ...
ACSAC
2002
IEEE
15 years 2 months ago
2002
IEEE
Secure computer systems use both mandatory and discretionary access controls to restrict the flow of information through legitimate communication channels such as files, shared ...
OOPSLA
2005
Springer
15 years 3 months ago
2005
Springer
It is now well established that the device scaling predicted by Moore’s Law is no longer a viable option for increasing the clock frequency of future uniprocessor systems at the...
ANCS
2007
ACM
15 years 1 months ago
2007
ACM
There is a growing interest in designing high-performance network devices to perform packet processing at flow level. Applications such as stateful access control, deep inspection...