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» Secure Memory Accesses on Networks-on-Chip
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ASPLOS
2008
ACM
14 years 11 months ago
Archipelago: trading address space for reliability and security
Memory errors are a notorious source of security vulnerabilities that can lead to service interruptions, information leakage and unauthorized access. Because such errors are also ...
Vitaliy B. Lvin, Gene Novark, Emery D. Berger, Ben...
OSDI
2004
ACM
15 years 10 months ago
Enhancing Server Availability and Security Through Failure-Oblivious Computing
We present a new technique, failure-oblivious computing, that enables servers to execute through memory errors without memory corruption. Our safe compiler for C inserts checks th...
Martin C. Rinard, Cristian Cadar, Daniel Dumitran,...
ACSAC
2008
IEEE
15 years 4 months ago
Defending Against Attacks on Main Memory Persistence
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
William Enck, Kevin R. B. Butler, Thomas Richardso...
MICRO
2003
IEEE
148views Hardware» more  MICRO 2003»
15 years 2 months ago
Fast Secure Processor for Inhibiting Software Piracy and Tampering
Due to the widespread software piracy and virus attacks, significant efforts have been made to improve security for computer systems. For stand-alone computers, a key observation...
Jun Yang 0002, Youtao Zhang, Lan Gao
NETWORK
2007
100views more  NETWORK 2007»
14 years 9 months ago
Parallel Programmable Ethernet Controllers: Performance and Security
Programmable network interfaces can provide network servers with a flexible interface to high-bandwidth Ethernet links, but they face critical software and architectural challenge...
Derek L. Schuff, Vijay S. Pai, Paul Willmann, Scot...