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HPCA
2006
IEEE
16 years 4 months ago
Software-hardware cooperative memory disambiguation
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
Ruke Huang, Alok Garg, Michael C. Huang
SIGMOD
2009
ACM
218views Database» more  SIGMOD 2009»
16 years 4 months ago
DejaVu: declarative pattern matching over live and archived streams of events
DejaVu is an event processing system that integrates declarative pattern matching over live and archived streams of events on top of a novel system architecture. We propose to dem...
Nihal Dindar, Baris Güç, Patrick Lau, ...
ICWS
2009
IEEE
16 years 1 months ago
Behavioral Attestation for Business Processes
Service Oriented Architecture (SOA) is an architectural paradigm that enables dynamic composition of heterogeneous, independent, multi-vendor business services. A prerequisite for...
Masoom Alam, Mohammad Nauman, Xinwen Zhang, Tamlee...
ICCD
2006
IEEE
117views Hardware» more  ICCD 2006»
16 years 22 days ago
System-Level Energy Modeling for Heterogeneous Reconfigurable Chip Multiprocessors
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
Xiaofang Wang, Sotirios G. Ziavras
ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
16 years 22 days ago
Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
Ernst Martin Witte, Anupam Chattopadhyay, Oliver S...
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