1353 search results - page 262 / 271 » Securing Current and Future Process Control Systems |
125
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NOCS
2008
IEEE
15 years 6 months ago
2008
IEEE
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
89
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ISCA
2006
IEEE
15 years 5 months ago
2006
IEEE
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
HICSS
2003
IEEE
15 years 5 months ago
2003
IEEE
Small ubiquitous devices connected by wireless networks will become future Internet appliances. To support them, communication networks must evolve to seamlessly assist appliances...
108
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ICS
2000
Tsinghua U.
15 years 3 months ago
2000
Tsinghua U.
As the performance gap between the CPU and main memory continues to grow, techniques to hide memory latency are essential to deliver a high performance computer system. Prefetchin...
WCE
2007
15 years 25 days ago
2007
—This paper presents one of the outcomes of a research project concerned with the development of a method for synthesizing, under controlled conditions in the laboratory, the ran...