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» Selected Methods of Model Checking Using SAT and SMT-Solvers
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ICCD
2003
IEEE
98views Hardware» more  ICCD 2003»
15 years 7 months ago
Specifying and Verifying Systems with Multiple Clocks
Multiple clock domains are a challenge for hardware specification and verification. We present a method for specifying the relations between multiple clocks, and for modeling th...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
IFIP
2001
Springer
15 years 2 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre
FMICS
2006
Springer
15 years 2 months ago
SAT-Based Verification of LTL Formulas
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
Wenhui Zhang
BIRTHDAY
2007
Springer
15 years 4 months ago
Models and Software Model Checking of a Distributed File Replication System
With the Distributed File System Replication component, DFS-R, as the central theme, we present selected protocol problems and validation methods encountered during design and deve...
Nikolaj Bjørner
FORTE
2010
14 years 12 months ago
On Efficient Models for Model Checking Message-Passing Distributed Protocols
Abstract. The complexity of distributed algorithms, such as state machine replication, motivates the use of formal methods to assist correctness verification. The design of the for...
Péter Bokor, Marco Serafini, Neeraj Suri