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» Selected Methods of Model Checking Using SAT and SMT-Solvers
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ACSD
2003
IEEE
105views Hardware» more  ACSD 2003»
15 years 2 months ago
Detecting State Coding Conflicts in STG Unfoldings Using SAT
Abstract. The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
FMCAD
2004
Springer
15 years 3 months ago
Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States
Most symbolic model checkers are based on either Binary Decision Diagrams (BDDs), which may grow exponentially large, or Satisfiability (SAT) solvers, whose time requirements rapi...
Mohammad Awedh, Fabio Somenzi
MTV
2006
IEEE
138views Hardware» more  MTV 2006»
15 years 4 months ago
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs
In this paper we will present an optimized structural 01X-SAT-solver for bounded model checking of blackbox designs that exploits semantical knowledge regarding the node selection...
Marc Herbstritt, Bernd Becker, Christoph Scholl
SAT
2010
Springer
158views Hardware» more  SAT 2010»
15 years 2 months ago
Dynamic Scoring Functions with Variable Expressions: New SLS Methods for Solving SAT
Abstract. We introduce a new conceptual model for representing and designing Stochastic Local Search (SLS) algorithms for the propositional satisfiability problem (SAT). Our model...
Dave A. D. Tompkins, Holger H. Hoos
ENTCS
2007
156views more  ENTCS 2007»
14 years 10 months ago
Bounded Model Checking with Parametric Data Structures
Bounded Model Checking (BMC) is a successful refutation method to detect errors in not only circuits and other binary systems but also in systems with more complex domains like ti...
Erika Ábrahám, Marc Herbstritt, Bern...