376 search results - page 58 / 76 » Self-Assembled Circuit Patterns |
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
— All-solution Boolean satisfiability (SAT) solvers are engines employed to find all the possible solutions to a SAT problem. Their applications are found throughout the EDA in...
95
Voted
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
62
Voted
DFT
2002
IEEE
15 years 2 months ago
2002
IEEE
1 The objective of this paper is to propose a new fault model suitable for test pattern generation for an FPGA configured to implement a given application. The paper demonstrates t...
CASES
2006
ACM
15 years 1 months ago
2006
ACM
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
In this paper we propose a test compaction method for path delay faults in a logic circuit. The method generates a compact set of two-pattern tests for faults on long paths select...