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AUTOID
2005
IEEE
15 years 3 months ago
A Low Power and High Performance Analog Front End for Passive RFID Transponder
This paper presents a novel low power and high performance analog front end circuit for passive RFID transponder. With a novel architecture including three rectifier circuits, amo...
Jianyun Hu, Hao Min
VTS
1997
IEEE
133views Hardware» more  VTS 1997»
15 years 1 months ago
ATPG for scan chain latches and flip-flops
A new approach for testing the bistable elements (latches and flip-flops) in scan chain circuits is presented. In this approach, we generate test patterns that apply a checking ex...
Samy Makar, Edward J. McCluskey
DSD
2007
IEEE
140views Hardware» more  DSD 2007»
15 years 3 months ago
Pseudo-Random Pattern Generator Design for Column-Matching BIST
This paper discusses possibilities for a choice of a pseudorandom pattern generator that is to be used in combination with the column-matching based built-in self-test design meth...
Petr Fiser
ICCAD
2003
IEEE
135views Hardware» more  ICCAD 2003»
15 years 2 months ago
ATPG for Noise-Induced Switch Failures in Domino Logic
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
Rahul Kundu, R. D. (Shawn) Blanton
ISQED
2007
IEEE
187views Hardware» more  ISQED 2007»
15 years 3 months ago
High-Frequency-Measurement-Based Frequency-Variant Transmission Line Characterization and Circuit Modeling for Accurate Signal I
Novel experimental characterization method and circuit modeling for frequency-variant transmission lines are presented. Experimental test patterns are designed and fabricated by u...
Hyunsik Kim, Yungseon Eo