605 search results - page 46 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
ICPP
2009
IEEE
14 years 7 months ago
2009
IEEE
This paper introduces a new highly optimized architecture for remote memory access (RMA). RMA, using put and get operations, is a one-sided communication function which amongst ot...
DAC
2000
ACM
15 years 10 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
MICRO
2003
IEEE
15 years 3 months ago
2003
IEEE
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
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FMCAD
1998
Springer
15 years 2 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
DAC
1999
ACM
15 years 2 months ago
1999
ACM
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...