605 search results - page 53 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
107
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VLSID
2002
IEEE
16 years 1 months ago
2002
IEEE
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...
102
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AAAI
1990
15 years 2 months ago
1990
Knowledge processing is very demanding on computer architectures. Knowledge processing generates subcomputation paths at an exponential rate. It is memory intensive and has high c...
108
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ASAP
2003
IEEE
15 years 6 months ago
2003
IEEE
Symmetric-key block ciphers encrypt data, providing data confidentiality over the public Internet. For inter-operability reasons, it is desirable to support a variety of symmetric...
ASPLOS
2010
ACM
15 years 8 months ago
2010
ACM
This paper introduces a new abstraction to accelerate the readbarriers and write-barriers used by language runtime systems. We exploit the fact that, dynamically, many barrier exe...
DAC
2004
ACM
16 years 2 months ago
2004
ACM
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...