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POPL
2003
ACM
15 years 10 months ago
Bitwidth aware global register allocation
Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is assigned a r...
Sriraman Tallam, Rajiv Gupta
CODES
2008
IEEE
15 years 4 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
UAIS
2008
104views more  UAIS 2008»
14 years 9 months ago
A knowledge-based sign synthesis architecture
This paper presents the modules that comprise a knowledge-based sign synthesis architecture for Greek sign language (GSL). Such systems combine natural language (NL) knowledge, mac...
Stavroula-Evita Fotinea, Eleni Efthimiou, George C...
VLSI
2007
Springer
15 years 4 months ago
Fast estimation of software energy consumption using IPI(Inter-Prefetch Interval) energy model
In this paper, we present the way of fast and accurate estimation of software energy consumption in off-the-shelf processor using IPI(Inter-Prefetch Interval) energy model. In ou...
Jungsoo Kim, Kyungsu Kang, Heejun Shim, Woong Hwan...
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
15 years 10 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar