605 search results - page 63 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
DAC
2004
ACM
15 years 10 months ago
2004
ACM
ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
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ICS
2007
Tsinghua U.
15 years 4 months ago
2007
Tsinghua U.
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
MOBIHOC
2008
ACM
15 years 9 months ago
2008
ACM
Dealing with interference is one of the primary challenges to solve in the design of protocols for wireless ad-hoc networks. Most of the work in the literature assumes localized o...
DAC
1999
ACM
15 years 2 months ago
1999
ACM
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
ICDCS
2008
IEEE
15 years 4 months ago
2008
IEEE
— Checkpointing is an indispensable technique to provide fault tolerance for long-running high-throughput applications like those running on desktop grids. This paper argues that...