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ECBS
2007
IEEE
145views Hardware» more  ECBS 2007»
15 years 1 months ago
Automatic Verification and Performance Analysis of Time-Constrained SysML Activity Diagrams
We present in this paper a new approach for the automatic verification and performance analysis of SysML activity diagrams. Since timeliness is important in the design and analysi...
Yosr Jarraya, Andrei Soeanu, Mourad Debbabi, Fawzi...
AAAI
1997
14 years 10 months ago
Case and Constraint-Based Apartment Construction Project Planning System: FASTrak-APT
To effectively generate a fast and consistent apartment construction project network, Hyundai and KAIST have developed a case and constraint based project planning expert system f...
Kyoung Jun Lee, Hyun Woo Kim, Jae Kyu Lee, Tae Hwa...
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EUROMICRO
1996
IEEE
15 years 1 months ago
A Graph Rewriting Approach for Transformational Design of Digital Systems
Transformational design integrates design and verification. It combines "correctness by construciion" and design creativity by the use ofpre-proven behaviour preserving ...
Corrie Huijs
JOT
2010
114views more  JOT 2010»
14 years 8 months ago
Semantic Annotation for Java
This paper describes how to use annotation to provide semantic information. The applications include the automatic construction of a GUI so that the user input is constrained to a...
Douglas Lyon
CAV
2009
Springer
206views Hardware» more  CAV 2009»
15 years 10 months ago
D-Finder: A Tool for Compositional Deadlock Detection and Verification
D-Finder tool implements a compositional method for the verification of component-based systems described in BIP language encompassing multi-party interaction. For deadlock detecti...
Saddek Bensalem, Marius Bozga, Thanh-Hung Nguyen, ...