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CASES
2010
ACM
14 years 9 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
ISPAN
2008
IEEE
15 years 6 months ago
Task Parallelism for Object Oriented Programs
Parallel computing is notoriously challenging due to the difficulty in developing correct and efficient programs. With the arrival of multi-core processors for desktop systems, ...
Nasser Giacaman, Oliver Sinnen
EVOW
2011
Springer
14 years 3 months ago
Two Iterative Metaheuristic Approaches to Dynamic Memory Allocation for Embedded Systems
Abstract. Electronic embedded systems designers aim at finding a tradeoff between cost and power consumption. As cache memory management has been shown to have a significant imp...
María Soto, André Rossi, Marc Sevaux
WCNC
2008
IEEE
15 years 6 months ago
WiFlex: Multi-Channel Cooperative Protocols for Heterogeneous Wireless Devices
—1 In ISM bands, many wireless protocols proliferate such as 802.11, Bluetooth, and ZigBee. However, these incompatible protocols create complex coexistence and connectivity prob...
Jiwoong Lee, Jeonghoon Mo, Tran Minh Trung, Jean C...
ICCS
2007
Springer
15 years 6 months ago
Enabling Very-Large Scale Earthquake Simulations on Parallel Machines
Abstract. The Southern California Earthquake Center initiated a major largescale earthquake simulation called TeraShake. The simulations propagated seismic waves across a domain of...
Yifeng Cui, Reagan Moore, Kim Olsen, Amit Chourasi...