233 search results - page 12 / 47 » Semantical Counting Circuits |
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to librar...
FPGA
1998
ACM
15 years 1 months ago
1998
ACM
In this paper, we present an algorithm for circuit partitioning with complex resource constraints in large FPGAs. Traditional partitioning methods estimate the capacity of an FPGA...
102
Voted
ITC
1994
IEEE
15 years 1 months ago
1994
IEEE
Previous approaches to designing random pattern testable circuits use post-synthesis test point insertion to eliminate random pattern resistant (r.p.r.) faults. The approach taken...
83
Voted
ASPDAC
2008
ACM
14 years 11 months ago
2008
ACM
Scaling is currently the most popular technique used to improve performance metrics of CMOS circuits. This cannot go on forever because the properties that are responsible for the ...
ICCAD
1997
IEEE
15 years 1 months ago
1997
IEEE
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...