Abstract. By making use of modal logic techniques, the paper disentangles two semantically different readings of statements of the type X counts as Y in context C (the classificato...
Signal Transition Graphs (STG) are a formalism for the description of asynchronous circuit behaviour. In this paper we propose (and justify) a formal semantics of nondeterministic...
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
A new synthesis technique for designing finite state machines with on-line parity checking is presented. The output logic and the next-state logic of the finite state machines are...
Chaohuang Zeng, Nirmal R. Saxena, Edward J. McClus...
Optically Reconfigurable Gate Arrays (ORGAs), by exploiting the large storage capacity of holographic memory, offer the possibility of providing a virtual gate count that is much l...