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DATE
2010
IEEE
156views Hardware» more  DATE 2010»
15 years 2 months ago
Defect aware X-filling for low-power scan testing
Various X-filling methods have been proposed for reducing the shift and/or capture power in scan testing. The main drawback of these methods is that X-filling for low power leads t...
S. Balatsouka, V. Tenentes, Xrysovalantis Kavousia...
MJ
2008
58views more  MJ 2008»
14 years 11 months ago
Using multi-threshold threshold gates in RTD-based logic design: A case study
Abstract - The basic building blocks for Resonant Tunnelling Diode (RTD) logic circuits are Threshold Gates (TGs) instead of the conventional Boolean gates (AND, OR, NAND, NOR) due...
Héctor Pettenghi, Maria J. Avedillo, Jos&ea...
CORR
2010
Springer
152views Education» more  CORR 2010»
14 years 9 months ago
Fault Tolerant Variable Block Carry Skip Logic (VBCSL) using Parity Preserving Reversible Gates
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
Md. Saiful Islam 0003, Muhammad Mahbubur Rahman, Z...
IJCNLP
2004
Springer
15 years 5 months ago
Using a Smoothing Maximum Entropy Model for Chinese Nominal Entity Tagging
This paper treats nominal entity tagging as a six-way (five categories plus nonentity) classification problem and applies a smoothing maximum entropy (ME) model with a Gaussian pr...
Jinying Chen, Nianwen Xue, Martha Stone Palmer
SIGIR
2003
ACM
15 years 5 months ago
HAT: a hardware assisted TOP-DOC inverted index component
A novel Hardware Assisted Top-Doc (HAT) component is disclosed. HAT is an optimized content indexing device based on a modified inverted index structure. HAT accommodates patterns...
S. Kagan Agun, Ophir Frieder