233 search results - page 41 / 47 » Semantical Counting Circuits |
DAC
1998
ACM
15 years 1 months ago
1998
ACM
—Functional simulation is still the primary workhorse for verifying the functional correctness of hardware designs. Functional verification is necessarily incomplete because it i...
CF
2007
ACM
15 years 1 months ago
2007
ACM
As we enter the era of petascale computing, system architects must plan for machines composed of tens or even hundreds of thousands of processors. Although fully connected network...
CF
2005
ACM
14 years 11 months ago
2005
ACM
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
74
Voted
SAC
2008
ACM
14 years 9 months ago
2008
ACM
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed testing of high-speed embedded processors testing in an SoC system. For SBST, test rout...
CHARME
1999
Springer
15 years 1 months ago
1999
Springer
Hardware description languages (HDLs) are used today to describe circuits at all levels. In large HDL programs, there is a need for source code reduction techniques to address a my...