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SAMOS
2007
Springer
15 years 11 months ago
Communication Architecture Simulation on the Virtual Synchronization Framework
As multi-processor system-on-chip (MPSoC) has become an effective solution to ever-increasing design complexity of modern embedded systems, fast and accurate HW/SW cosimulation of...
Taewook Oh, Youngmin Yi, Soonhoi Ha
ASPDAC
2004
ACM
88views Hardware» more  ASPDAC 2004»
15 years 11 months ago
A high performance bus communication architecture through bus splitting
Abstract— A split shared-bus architecture with multiple simultaneous bus accesses is proposed. Compared to traditional bus architectures, the performance of proposed architecture...
Ruibing Lu, Cheng-Kok Koh
ASPDAC
2009
ACM
117views Hardware» more  ASPDAC 2009»
15 years 10 months ago
Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications
– The phenomenon of digital convergence and increasing application complexity today is motivating the design of chip multiprocessor (CMP) applications with multiple use cases. Mo...
Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi
ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
16 years 2 months ago
Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous design, this requires the consideration o...
Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhi...
ISCAS
2005
IEEE
182views Hardware» more  ISCAS 2005»
15 years 11 months ago
A new reconfigurable modem architecture for 3G multi-standard wireless communication systems
– The trend in communication systems is towards more rapidly changing specifications with shorter time intervals between updates of existing standards. This results in a coexiste...
Jung-Ho Kim, Dong Sam Ha, Jeffrey H. Reed