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ISCA
2011
IEEE
313views Hardware» more  ISCA 2011»
14 years 1 months ago
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay ...
ASPLOS
2011
ACM
14 years 1 months ago
Hardware acceleration of transactional memory on commodity systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan...
ICALP
2011
Springer
14 years 1 months ago
On Tree-Constrained Matchings and Generalizations
We consider the following Tree-Constrained Bipartite Matching problem: Given two rooted trees T1 = (V1, E1), T2 = (V2, E2) and a weight function w : V1 × V2 → R+, find a maximu...
Stefan Canzar, Khaled M. Elbassioni, Gunnar W. Kla...
ICDE
2006
IEEE
207views Database» more  ICDE 2006»
15 years 11 months ago
Automatic Sales Lead Generation from Web Data
Speed to market is critical to companies that are driven by sales in a competitive market. The earlier a potential customer can be approached in the decision making process of a p...
Ganesh Ramakrishnan, Sachindra Joshi, Sumit Negi, ...
DAC
2009
ACM
15 years 10 months ago
ILP-based pin-count aware design methodology for microfluidic biochips
Digital microfluidic biochips have emerged as a popular alternative for laboratory experiments. To make the biochip feasible for practical applications, pin-count reduction is a k...
Cliff Chiung-Yu Lin, Yao-Wen Chang