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VLSID
2004
IEEE
146views VLSI» more  VLSID 2004»
15 years 10 months ago
CMOS Circuit Design for Minimum Dynamic Power and Highest Speed
{A new low-power design method produces CMOS circuits that consume the least dynamic power at the highest speed permitted under the technology constraint. A gate is characterized b...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
77
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ICALP
2009
Springer
15 years 10 months ago
Improved Algorithms for Latency Minimization in Wireless Networks
In the interference scheduling problem, one is given a set of n communication requests described by sourcedestination pairs of nodes from a metric space. The nodes correspond to d...
Alexander Fanghänel, Berthold Vöcking, T...
ICDE
2010
IEEE
251views Database» more  ICDE 2010»
15 years 9 months ago
Viewing a World of Annotations through AnnoVIP
The proliferation of electronic content has notably lead to the apparition of large corpora of interrelated structured documents (such as HTML and XML Web pages) and semantic annot...
Konstantinos Karanasos, Spyros Zoupanos
MOBIHOC
2003
ACM
15 years 9 months ago
Energy-efficient caching strategies in ad hoc wireless networks
In this paper, we address the problem of energy-conscious cache placement in wireless ad hoc networks. We consider a network comprising a server with an interface to the wired net...
Pavan Nuggehalli, Vikram Srinivasan, Carla-Fabiana...
ICCAD
2002
IEEE
161views Hardware» more  ICCAD 2002»
15 years 6 months ago
Non-tree routing for reliability and yield improvement
We propose to introduce redundant interconnects for manufacturing yield and reliability improvement. By introducing redundant interconnects, the potential for open faults is reduc...
Andrew B. Kahng, Bao Liu, Ion I. Mandoiu