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DDECS
2007
IEEE
90views Hardware» more  DDECS 2007»
15 years 6 months ago
Test Pattern Generator for Delay Faults
A method of generating test pairs for the delay faults is presented in this paper. The modification of the MISR register gives the source of test pairs. The modification of this r...
Tomasz Rudnicki, Andrzej Hlawiczka
143
Voted
ACSAC
2004
IEEE
15 years 6 months ago
RACOON: Rapidly Generating User Command Data For Anomaly Detection From Customizable Templates
One of the biggest obstacles faced by user command based anomaly detection techniques is the paucity of data. Gathering command data is a slow process often spanning months or yea...
Ramkumar Chinchani, Aarthie Muthukrishnan, Madhusu...
135
Voted
AUSAI
2006
Springer
15 years 6 months ago
Robust Character Recognition Using a Hierarchical Bayesian Network
There is increasing evidence to suggest that the neocortex of the mammalian brain does not consist of a collection of specialised and dedicated cortical architectures, but instead ...
John Thornton, Torbjorn Gustafsson, Michael Blumen...
134
Voted
CASES
2006
ACM
15 years 6 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
127
Voted
CIKM
2006
Springer
15 years 6 months ago
TRIPS and TIDES: new algorithms for tree mining
Recent research in data mining has progressed from mining frequent itemsets to more general and structured patterns like trees and graphs. In this paper, we address the problem of...
Shirish Tatikonda, Srinivasan Parthasarathy, Tahsi...
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