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DFT
2003
IEEE
64views VLSI» more  DFT 2003»
15 years 9 months ago
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, ...
ICPP
2003
IEEE
15 years 9 months ago
Towards Real-time Parallel Processing of Spatial Queries
Spatial databases are entering an era of mass deployment in various real-life applications, especially mobile and location-based services. The real-time processing of spatial quer...
Haibo Hu, Manli Zhu, Dik Lun Lee
GECCO
2003
Springer
148views Optimization» more  GECCO 2003»
15 years 9 months ago
Structural and Functional Sequence Test of Dynamic and State-Based Software with Evolutionary Algorithms
Evolutionary Testing (ET) has been shown to be very successful for testing real world applications [10]. The original ET approach focusesonsearching for a high coverage of the test...
André Baresel, Hartmut Pohlheim, Sadegh Sad...
IPPS
1999
IEEE
15 years 8 months ago
GA-Based Parallel Image Registration on Parallel Clusters
Genetic Algorithms (GAs) have been known to be robust for search and optimization problems. Image registration can take advantage of the robustness of GAs in finding best transform...
Prachya Chalermwat, Tarek A. El-Ghazawi, Jacquelin...
ITC
1999
IEEE
107views Hardware» more  ITC 1999»
15 years 8 months ago
A high-level BIST synthesis method based on a region-wise heuristic for an integer linear programming
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
Han Bin Kim, Dong Sam Ha