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144
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FPGA
2008
ACM
145views FPGA» more  FPGA 2008»
15 years 6 months ago
FPGA interconnect design using logical effort
Logical effort (LE) is a linear technique for modelling the delay of a circuit in a technology independent manner. It offers the potential to simplify delay models for FPGAs and g...
Haile Yu, Yuk Hei Chan, Philip Heng Wai Leong
ESANN
2006
15 years 6 months ago
A Gaussian process latent variable model formulation of canonical correlation analysis
Abstract. We investigate a nonparametric model with which to visualize the relationship between two datasets. We base our model on Gaussian Process Latent Variable Models (GPLVM)[1...
Gayle Leen, Colin Fyfe
IIS
2004
15 years 6 months ago
Application of evolutionary computing to conformational analysis
In this paper we report new results concerning use of genetic algorithms in conformational analysis, field of pharmacy related to discovery and design of new drugs. The goal is to ...
Aleksander Wawer, Franciszek Seredynski, Pascal Bo...
107
Voted
CORR
2006
Springer
81views Education» more  CORR 2006»
15 years 4 months ago
Low density codes achieve the rate-distortion bound
Abstract: We propose a new construction for low-density source codes with multiple parameters that can be tuned to optimize the performance of the code. In addition, we introduce a...
Emin Martinian, Martin J. Wainwright
CORR
2007
Springer
115views Education» more  CORR 2007»
15 years 4 months ago
Real Options for Project Schedules (ROPS)
Real Options for Project Schedules (ROPS) has three recursive sampling/optimization shells. An outer Adaptive Simulated Annealing (ASA) optimization shell optimizes parameters of ...
Lester Ingber