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148
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USENIX
2003
15 years 7 months ago
2003
We present an in-kernel disk prefetcher which uses speculative execution to determine what data an application is likely to require in the near future. By placing our design withi...
166
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TC
1998
15 years 5 months ago
1998
—High instruction cache hit rates are key to high performance. One known technique to improve the hit rate of caches is to minimize cache interference by improving the layout of ...
159
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MONET
2007
15 years 5 months ago
2007
We describe a prototype Context Aware Perioperative Information System to capture and interpret data in an operating room of the future. The captured data is used to construct the...
136
Voted
RTSS
2007
IEEE
16 years 2 days ago
2007
IEEE
In this paper, we propose to implement hybrid operating systems based on two-level hardware interrupts. To separate real-time and non-real-time hardware interrupts by hardware, we...
175
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SBMF
2009
Springer
16 years 10 days ago
2009
Springer
In today’s information society, flash memory has become a virtually indispensable component, particularly for mobile devices. In order for mobile devices to operate successfully...