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CASES
2009
ACM
15 years 2 months ago
Complete nanowire crossbar framework optimized for the multi-spacer patterning technique
Nanowire crossbar circuits are an emerging architectural paradigm that promises a higher integration density and an improved fault-tolerance due to its reconfigurability. In this...
M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf ...
ASPDAC
1998
ACM
105views Hardware» more  ASPDAC 1998»
15 years 1 months ago
Techniques for Functional Test Pattern Execution
Functional debugging often dominates the time and cost of the ASIC system development, mainly due to the limited controllability and observability of the storage elements in desig...
Inki Hong, Miodrag Potkonjak
NIPS
2007
14 years 11 months ago
Invariant Common Spatial Patterns: Alleviating Nonstationarities in Brain-Computer Interfacing
Brain-Computer Interfaces can suffer from a large variance of the subject conditions within and across sessions. For example vigilance fluctuations in the individual, variable ta...
Benjamin Blankertz, Motoaki Kawanabe, Ryota Tomiok...
SPIN
1999
Springer
15 years 1 months ago
Events in Property Patterns
A pattern-based approach to the presentation, codification and reuse of property specifications for finite-state verification was proposed by Dwyer and his colleagues in [4, 3]...
Marsha Chechik, Dimitrie O. Paun
VLSID
2002
IEEE
115views VLSI» more  VLSID 2002»
15 years 10 months ago
A Partitioning and Storage Based Built-In Test Pattern Generation Method for Scan Circuits
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...
Irith Pomeranz, Sudhakar M. Reddy