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154
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ICCD
2003
IEEE
143views Hardware» more  ICCD 2003»
15 years 8 months ago
Aggressive Test Power Reduction Through Test Stimuli Transformation
Excessive switching activity during shift cycles in scan-based cores imposes considerable test power challenges. To ensure rapid and reliable test of SOCs, we propose a scan chain...
Ozgur Sinanoglu, Alex Orailoglu
150
Voted
HYBRID
2003
Springer
15 years 8 months ago
Model Checking LTL over Controllable Linear Systems Is Decidable
Abstract. The use of algorithmic verification and synthesis tools for hybrid systems is currently limited to systems exhibiting simple continuous dynamics such as timed automata o...
Paulo Tabuada, George J. Pappas
128
Voted
ICCAD
2002
IEEE
89views Hardware» more  ICCAD 2002»
15 years 8 months ago
Free space management for cut-based placement
IP blocks and large macro cells are increasingly prevalent in physical design, actually causing an increase in the available free space for the dust logic. We observe that top-dow...
Charles J. Alpert, Gi-Joon Nam, Paul Villarrubia
APN
2000
Springer
15 years 7 months ago
Pre- and Post-agglomerations for LTL Model Checking
One of the most efficient analysis technique is to reduce an original model into a simpler one such that the reduced model has the same properties than the original one. G. Berthel...
Denis Poitrenaud, Jean-François Pradat-Peyr...
ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
15 years 7 months ago
Active Pages: A Computation Model for Intelligent Memory
Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive comp...
Mark Oskin, Frederic T. Chong, Timothy Sherwood