For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
Dirk Stroobandt, Peter Verplaetse, Jan Van Campenh...
Mobile information appliances are increasingly used in numerous different situations and locations, setting new requirements to their interaction methods. When the user's situ...
Albrecht Schmidt, Kofi Asante Aidoo, Antti Takaluo...
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Skyline queries compute the set of Pareto-optimal tuples in a relation, i.e., those tuples that are not dominated by any other tuple in the same relation. Although several algorit...
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...