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ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
15 years 4 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
ANCS
2005
ACM
15 years 3 months ago
Segmented hash: an efficient hash table implementation for high performance networking subsystems
Hash tables provide efficient table implementations, achieving O(1), query, insert and delete operations at low loads. However, at moderate or high loads collisions are quite freq...
Sailesh Kumar, Patrick Crowley
MOBICOM
2004
ACM
15 years 3 months ago
Using code collection to support large applications on mobile devices
The progress of mobile device technology unfolds a new spectrum of applications that challenges conventional infrastructure models. Most of these devices are perceived by their us...
Lucian Popa 0002, Irina Athanasiu, Costin Raiciu, ...
OOPSLA
2004
Springer
15 years 3 months ago
Hard real-time: C++ versus RTSJ
In the domain of hard real-time systems, which language is better: C++ or the Real-Time Specification for Java (RTSJ)? Although standard Java provides a more productive programmin...
Daniel L. Dvorak, William K. Reinholtz
ISCA
2000
IEEE
121views Hardware» more  ISCA 2000»
15 years 2 months ago
Selective, accurate, and timely self-invalidation using last-touch prediction
Communication in cache-coherent distributed shared memory (DSM) often requires invalidating (or writing back) cached copies of a memory block, incurring high overheads. This paper...
An-Chow Lai, Babak Falsafi