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LCPC
2007
Springer
15 years 10 months ago
Revisiting SIMD Programming
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
Anton Lokhmotov, Benedict R. Gaster, Alan Mycroft,...
CCECE
2006
IEEE
15 years 10 months ago
cDNA Microarray Imaging using Single-Sensor Technology
A new solution for cDNA microarray image acquisition and processing is introduced. The proposed solution uses a two-color filter array placed on top of a single image sensor to c...
Rastislav Lukac, Konstantinos N. Plataniotis
IJCNN
2006
IEEE
15 years 10 months ago
SOM-Based Sparse Binary Encoding for AURA Classifier
—The AURA k-Nearest Neighbour classifier associates binary input and output vectors, forming a compact binary Correlation Matrix Memory (CMM). For a new input vector, matching ve...
Simon O'Keefe
FPGA
2005
ACM
174views FPGA» more  FPGA 2005»
15 years 9 months ago
64-bit floating-point FPGA matrix multiplication
We introduce a 64-bit ANSI/IEEE Std 754-1985 floating point design of a hardware matrix multiplier optimized for FPGA implementations. A general block matrix multiplication algor...
Yong Dou, Stamatis Vassiliadis, Georgi Kuzmanov, G...
HIPC
2005
Springer
15 years 9 months ago
The Potential of On-Chip Multiprocessing for QCD Machines
We explore the opportunities offered by current and forthcoming VLSI technologies to on-chip multiprocessing for Quantum Chromo Dynamics (QCD), a computational grand challenge for ...
Gianfranco Bilardi, Andrea Pietracaprina, Geppino ...