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MICRO
2008
IEEE
103views Hardware» more  MICRO 2008»
15 years 4 months ago
Testudo: Heavyweight security analysis via statistical sampling
Heavyweight security analysis systems, such as taint analysis and dynamic type checking, are powerful technologies used to detect security vulnerabilities and software bugs. Tradi...
Joseph L. Greathouse, Ilya Wagner, David A. Ramos,...
SIGCOMM
1998
ACM
15 years 2 months ago
Fast and Scalable Layer Four Switching
In Layer Four switching, the route and resources allocated to a packet are determined by the destination address as well as other header elds of the packet such as source address,...
Venkatachary Srinivasan, George Varghese, Subhash ...
EUC
2006
Springer
15 years 1 months ago
Write Back Routine for JFFS2 Efficient I/O
Abstract. When flash memory is used as a storage in embedded systems, block level translation layer is required between conventional filesystem and flash memory chips due to its ph...
Seung Ho Lim, Sung Hoon Baek, Joo Young Hwang, Kyu...
ASPLOS
2012
ACM
13 years 5 months ago
Reflex: using low-power processors in smartphones without knowing them
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
Felix Xiaozhu Lin, Zhen Wang, Robert LiKamWa, Lin ...
ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
15 years 2 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...