1053 search results - page 182 / 211 » Shape as Memory Storage |
133
Voted
PLDI
2010
ACM
15 years 8 months ago
2010
ACM
The availability of multicore processors has led to significant interest in compiler techniques for speculative parallelization of sequential programs. Isolation of speculative s...
120
Voted
ICIP
2000
IEEE
16 years 5 months ago
2000
IEEE
Recently we have applied Look Up Table (LUT) Method for inverse halftoning. We also proposed tree-structure LUT inverse halftoning in order to reduce memory requirements of the LU...
156
Voted
SPAA
2009
ACM
16 years 4 months ago
2009
ACM
Thread-level speculation (TLS) is a technique that allows parts of a sequential program to be executed in parallel. TLS ensures the parallel program's behaviour remains true ...
124
Voted
HPCA
2009
IEEE
16 years 4 months ago
2009
IEEE
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
126
Voted
STOC
2003
ACM
16 years 3 months ago
2003
ACM
We describe a simple randomized construction for generating pairs of hash functions h1, h2 from a universe U to ranges V = [m] = {0, 1, . . . , m - 1} and W = [m] so that for ever...