Sciweavers

923 search results - page 145 / 185
» Shared Memory Performance Profiling
Sort
View
156
Voted
IEEEPACT
2005
IEEE
15 years 10 months ago
Characterization of TCC on Chip-Multiprocessors
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi...
129
Voted
HASKELL
2005
ACM
15 years 10 months ago
Haskell on a shared-memory multiprocessor
Multi-core processors are coming, and we need ways to program them. The combination of purely-functional programming and explicit, monadic threads, communicating using transaction...
Tim Harris, Simon Marlow, Simon L. Peyton Jones
ICS
2005
Tsinghua U.
15 years 10 months ago
Optimization of MPI collective communication on BlueGene/L systems
BlueGene/L is currently the world’s fastest supercomputer. It consists of a large number of low power dual-processor compute nodes interconnected by high speed torus and collect...
George Almási, Philip Heidelberger, Charles...
CCGRID
2003
IEEE
15 years 10 months ago
Discretionary Caching for I/O on Clusters
I/O bottlenecks are already a problem in many largescale applications that manipulate huge datasets. This problem is expected to get worse as applications get larger, and the I/O ...
Murali Vilayannur, Anand Sivasubramaniam, Mahmut T...
ASPLOS
1998
ACM
15 years 9 months ago
Data Speculation Support for a Chip Multiprocessor
Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the sup...
Lance Hammond, Mark Willey, Kunle Olukotun