2 search results - page 1 / 1 » ShatterPB: symmetry-breaking for pseudo-Boolean formulas |
79
Voted
ASPDAC
2004
ACM
15 years 5 months ago
2004
ACM
Many important tasks in circuit design and verification can be performed in practice via reductions to Boolean Satisfiability (SAT), making SAT a fundamental EDA problem. However ...
58
Voted
JEA
2007
14 years 11 months ago
2007