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TECS
2010
47views more  TECS 2010»
14 years 8 months ago
Online memory compression for embedded systems
Lei Yang, Robert P. Dick, Haris Lekatsas, Srimat T...
DATE
2006
IEEE
159views Hardware» more  DATE 2006»
15 years 7 months ago
Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
IMS
2000
125views Hardware» more  IMS 2000»
15 years 5 months ago
Compiler-Directed Cache Line Size Adaptivity
The performance of a computer system is highly dependent on the performance of the cache memory system. The traditional cache memory system has an organization with a line size tha...
Dan Nicolaescu, Xiaomei Ji, Alexander V. Veidenbau...