4747 search results - page 116 / 950 » Shuffle Memory System |
113
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EMNLP
2011
14 years 1 months ago
2011
We exploit sketch techniques, especially the Count-Min sketch, a memory, and time efficient framework which approximates the frequency of a word pair in the corpus without explic...
105
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ISCA
1997
IEEE
15 years 5 months ago
1997
IEEE
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...
126
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CC
2008
Springer
15 years 3 months ago
2008
Springer
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
123
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WOMPAT
2001
Springer
15 years 6 months ago
2001
Springer
In contrast to the common belief that OpenMP requires data-parallel extensions to scale well on architectures with non-uniform memory access latency, recent work has shown that it ...
104
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OSDI
2008
ACM
16 years 1 months ago
2008
ACM
Memory bandwidth is a scarce resource in multicore systems. Scheduling has a dramatic impact on the delay introduced by memory contention, but also on the effectiveness of frequen...