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ASPDAC
2006
ACM
116views Hardware» more  ASPDAC 2006»
15 years 7 months ago
Abridged addressing: a low power memory addressing strategy
Abstract— The memory subsystem is known to comprise a significant fraction of the power dissipation in embedded systems. The memory addressing strategy, which determines the seq...
Preeti Ranjan Panda
CCGRID
2001
IEEE
15 years 5 months ago
Adaptive Prefetching Technique for Shared Virtual Memory
Though shared virtual memory (SVM) systems promise low cost solutions for high performance computing, they suffer from long memory latencies. These latencies are usually caused by...
Sang-Kwon Lee, Hee-Chul Yun, Joonwon Lee, Seungryo...
RV
2010
Springer
104views Hardware» more  RV 2010»
15 years 2 days ago
StealthWorks: Emulating Memory Errors
A study of Google’s data center revealed that the incidence of main memory errors is surprisingly high. These errors can lead to application and system corruption, impacting reli...
Musfiq Rahman, Bruce R. Childers, Sangyeun Cho
OPODIS
2003
15 years 3 months ago
Decoupled Interconnection of Distributed Memory Models
In this paper we present a framework to formally describe and study the interconnection of distributed shared memory systems. In our models we minimize the dependencies between the...
Ernesto Jiménez, Antonio Fernández, ...
FPL
2010
Springer
155views Hardware» more  FPL 2010»
14 years 11 months ago
Design and Implementation of Real-Time Transactional Memory
Transactional memory is a promising, optimistic synchronization mechanism for chip-multiprocessor systems. The simplicity of atomic sections, instead of using explicit locks, is al...
Martin Schoeberl, Peter Hilber